The PCI Latency indicates the number of clock cycles, for which a PCI Busmaster device may stress the bus for itself, before it is again released. This minimum number of clocks is to prevent that the PCI performance sinks too heavily due to frequent aborts of the Burst phases. At the same time the Latency timer prevents the exclusive recourse of the PCI bus by only one device. After the PCI Latency time sequence during a Burst phase every other PCI DEVICE can request the bus. The Burst is then aborted immediately. 0.20b6, 0.20b9, 0.20b10, 0.20b11 will cool Athlon CPUs. Not for use on Slot 1 Athlons with KX133 chipset.

0.19d maximizes RAID performance, but is dangerous on Asus A7V266/A7V333.

Almost all 0.19 versions, and 0.20 betas below 0.20b18, are unsafe on Asus A7V / A7V133. Download VIA PCI Latency Patch 0.20b18 third article from bottom of the page.

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